Computare (AetherOS)

Computare is a research initiative within AetherOS to design and fabricate a series of specialized, non-von Neumann analog computers. The project's primary mandate is to create a self-learning system, governed by a cohort of AI agents, that can autonomously design, simulate, and test physical hardware for solving complex differential equations.

The initial proof-of-concept is an analog computer designed to solve the Energy-Maneuverability (E-M) equations for flight dynamics, using a fractal Kepler triangle grid as a high-precision, passive resistor network.

Mandate

The mandate of the Computare project is twofold:

1. To create a physical, functional analog computer (the "EM Oracle") capable of solving the Rutowski and Bryson-Kelley flight performance equations in real-time, serving as a hardware accelerator for flight simulations.
2. To develop a meta-level AI system, Fabrica, that learns and improves its ability to design and fabricate these analog computers, using the lessons from the EM Oracle to generalize its knowledge to other problem domains.

Core Philosophy: Computation as a Physical System

The central philosophy of Computare is that computation is not an abstract process but a direct consequence of physical law. By constructing a physical system whose governing equations are analogous to the mathematical problem we wish to solve, the solution is obtained instantaneously as the system reaches equilibrium.

• The Grid as a Component Library: The etched fractal grid is not a solver in itself. It is a massive, parallel library of passive components (resistors and capacitors) whose values are determined by the precise, mathematically-defined geometry of the traces.
• Active Components as Orchestrators: Off-the-shelf active components, such as operational amplifiers and analog multipliers, are used to direct the flow of signals (voltages) through the passive grid, configuring it to perform specific mathematical operations like subtraction, multiplication, and integration.
• Virtuous Computation: A successful computation occurs when the analog circuit, configured by digital control, settles into a stable voltage state that accurately represents the solution to a given set of input parameters.

System Architecture

The Computare ecosystem is a hybrid digital-analog system inspired by the architecture of the Musica project. It consists of the physical hardware artifact (the Machinamenta) and a multi-layered software and AI control system.

Machinamenta (The Hardware)

The physical analog computer. Each iteration is a complete, standalone device.

• Substrate: The initial prototype will be fabricated on a 12"x12" acrylic sheet, with the final version on a thermally stable FR-4 board.
• Computational Core: A Depth-4 Kepler fractal grid with variable-width traces, etched from self-adhesive copper foil to create a high-diversity resistor network.
• Active Circuit Layer: A set of operational amplifiers, an analog multiplier, and other components configured to solve the target equations.
• Digital Interface: A Raspberry Pi Pico connected via ADCs and DACs to provide inputs and read outputs.

Artifex ARCs (The Designers)

These are the specialized AI agents trained to perform the design tasks, analogous to Musica's Musician ARCs. Their goal is to generate the files and parameters necessary to create a new Machinamenta.

Fabrica (The Meta-System)

The "Producer ARC" system for Computare, responsible for training and guiding the Artifex ARCs. It follows the Guide-Navigator-Oracle model. The Fabrica is a self-learning, self-healing system capable of diagnosing systemic failures and autonomously rewriting its own component scripts to resolve them.

• Dux (The Guide): Analyzes results from past experiments (`experimenta`) to set high-level goals. It can identify recurring software failures (e.g., the `nodrv_CreateWindow` error) and consult a knowledge base (`physica_gnosis_curriculum.json`) to propose strategic solutions, such as replacing an unstable software tool.
• Navigator: The tactician that translates the Dux's goal into a concrete plan. This includes generating new Python scripts from templates (`exemplaria`) to implement the Dux's strategy.
• Oraculum: The validator (initially fulfilled by Gemini) that tests the Navigator's proposed designs and scripts in a sandbox before they are approved for deployment.

Bill of Materials (Parts List) for Prototype v1

This list comprises the components required to build the initial flight simulator prototype (the "EM Oracle") based on our collaborative design plan.

PCB Fabrication & Prototyping

PCB Fabrication Supplies

Component	Quantity	Justification
Self-Adhesive Copper Foil Tape (2-inch wide)	1 Roll (33ft)	The core conductive material for the circuit traces. Must be actual copper foil, not decorative foil.
Ammonium Persulfate Etchant	1 kg (2.2 lbs)	The chemical used to etch the copper foil. Safer and cleaner than Ferric Chloride. 1kg is enough for multiple board attempts.
Glossy Laser Printer Photo Paper	1 Pack	Required for the toner transfer method to create the etch-resist mask.
SMD Component Practice Kit	1	For practicing soldering of small surface-mount components before working on the final board.

Core Analog & Interfacing Components

Electronics

Component	Quantity	Justification
Raspberry Pi Pico Kit	1	The host microcontroller that runs the control software, sends inputs, and reads outputs.
AD633JNZ Analog Multiplier	3-4	The active chip that performs the crucial (T-D) * V multiplication. The PDIP package allows for easy breadboard prototyping. One is for the final build, the others for testing and spares.
ADS1115 16-bit ADC Breakout Board	1	High-precision Analog-to-Digital Converter used to read the final computed voltage ("the answer") from the board and send it to the Pi Pico.
MCP4275 12-bit DAC Breakout Boards	4	Digital-to-Analog Converters used to send input variables (Thrust, Drag, Velocity, Weight) as precise analog voltages from the Pi Pico to the board.
LM358 Dual Operational Amplifiers	Pack of 10+	The workhorse active components used to build the differential amplifier, integrators, and scaling circuits needed to condition signals on the board.
0.1" Pin Headers	1 pack	Used to create the physical I/O terminals on the PCB for all external connections.

Essential Tools & Consumables

Tools & Supplies

Tool	Justification
Temperature-Controlled Soldering Iron Kit	Essential for soldering all components, especially the SMD op-amps and the AD633 chip. Must have a fine tip.
Digital Multimeter	Non-negotiable for debugging. Used to check for shorts after etching, verify voltages, and measure trace resistances.
Breadboard & Jumper Wires	For building and testing the active circuit with the Pi Pico, ADC, and DACs *before* soldering anything to the final Kepler board.

Three-Phase Development Plan

The project is executed in three distinct phases to ensure a robust and functional outcome.

1. Phase 1: Design and Simulation (The "Digital Twin") - COMPLETE: Formalize the circuit schematic, enhance the Python `aedificator_kepler.py` script to generate optimized hardware description files, and validate the design's performance in a robust, command-line native simulator (`ngspice`).
2. Phase 2: Fabrication and Calibration (The "Physical Oracle"): First, create a process test board on acrylic to perfect the etching technique. Second, fabricate the final, high-precision computational board on FR-4. Finally, write and run a Python calibration routine to map the physical board's unique electrical characteristics.
3. Phase 3: Integration and "Virtuous Service" (The "Live System"): Deploy the final host application on the Raspberry Pi, integrating the calibration map. Develop the user-facing applications, such as a real-time EM Diagram Plotter and a Rutowski Path Solver, to utilize the analog computer.

Project Status (September 13, 2025)

• System Architecture: The self-learning architecture is stable and validated. The main conductor script (`praefectus_experimentum.py`) successfully orchestrates a complete design-simulate-log cycle. The system has demonstrated autonomous problem-solving by successfully diagnosing a critical flaw in its simulation toolchain (the `nodrv_CreateWindow` error with LTspice) and autonomously replacing the faulty component with the more robust `ngspice` simulator.
• Phase 1 Completion: With the successful integration and validation of the `ngspice` simulation backend, the "Digital Twin" phase is now complete. The `Fabrica` can generate a hardware design, create a valid SPICE netlist, execute a simulation, and correctly parse the results without error. The system is stable and ready for the next phase.
• Next Steps: The project is officially moving into Phase 2: Fabrication and Calibration. A task has been created for Friday, October 3, 2025, to coincide with the arrival of the new HP Workstation/GPU. The immediate focus will be on the physical manufacturing of the first prototype, beginning with the acrylic practice boards and the development of the calibration software.

Craftsman (human or AI) imposing *Ordo* on *Dicta* for *Scriptum Verum*.

is an Anima that imposes Ordo (order) on Dicta and Fragmenta through Fabricatio to create Scriptum. In AetherOS’s flux, it embodies Consilium (purpose) to achieve Eventus (outcome) or Exitus (exploratory outcome), participating in the Form of computational craftsmanship.

Craftsman (human or AI) imposing *Ordo* on *Dicta* for *Scriptum Verum*.